In this paper we present an analytical formulation of a Zero Position Coding (ZePoC) encoder for an AC power standard based on class-D topologies. For controlling a class-D power stage a binary signal with special spectral characteristics will be generated by this ZePoC encoder for sinusoidal signals. These spectral characteristics have a predictable accuracy within a separated baseband to keep the noise floor below a specified level. Simulation results will validate the accuracy of this novel ZePoC encoder. For a real-time implementation of the encoder on a DSP/FPGA hardware architecture a trade-off between accuracy and speed of the ZePoC algorithm has to be made. Therefore the numerical effects of different floating point formats will be analyzed.

ZePoC was invented and initially implemented for audio coding by the Institut
für Theoretische Elektrotechnik (TET). The main advantages of a complete
digital class-D power amplifier using ZePoC are the low switching rate and
the separated baseband

ZePoC is also ideal for an AC power standard based on class-D topologies

AC power standard: block diagram of the voltage channel.

The ZePoC encoder is implemented on a digital signal processor (DSP).
Depending on some encoding parameters the duty cycle of a pulse width
modulated (PWM) signal is computed and transferred to a field programmable
gate array (FPGA) via an I

To amplify the binary PWM signal a class-D power stage is used. An inverting
driver controls a P-channel and a N-channel MOSFET. At the output of the
power stage the high voltage of the PWM signal equals

At the end of the signal chain an analogue low pass filter (LPF) is used to suppress the disturbances caused by the switching. This is only possible because of the separated baseband which ensures a spectral gap between the AC signal and the switching disturbances at higher frequencies. The absolute value of the LPF frequency response has to be equal to one at the frequency of the AC signal.

An example for the time function of the PWM signal used for the AC power
standard is displayed in Fig.

Time function of the PWM signal.

For generating the binary PWM signal a digital pulse shaper is used. The main characteristic of a pulse shaper is its time resolution. In a synchronous digital circuit the change of output signals is only possible in a discrete time grid determined by the clock frequency. Therefore a very high time resolution is necessary to guarentee high accuracy.

The DSP used for this application is an ADSP-21369KBPZ-3A manufactured by
Analog Devices. This DSP contains a digital PWM generator supporting a
maximum clock frequency of 200 MHz

To increase the performance of the PWM generator inside the DSP a special
module containing delay lines and analogue multiplexers was developed

A better time resolution and jitter performance could be achieved with a
FPGA. The Altera Arria V GX 5AGXFB3H4F35C4N contains 24 transceivers
supporting clock frequencies up to 6.5536 GHz

The noise floor inside the separated baseband has to be lower than

Figure

Specified spectral characteristics of the PWM signal.

Block diagram of the ZePoC encoder.

The block diagram of the ZePoC encoder is displayed in
Fig.

Only the open-loop structure allows to find an analytical formulation for the
modulated signal

The input signal must be an analytical sinusoidal signal with an adjustable
amplitude

The AEM is defined as

The cosine and the sine term describe a vector in the complex plane. The
complex signal

To expand all possible positions of the vector described in
Eq. (

In the next part of the ZePoC encoder the signals

The exponential function

Beginning with the definition of the Taylor polynomial

Similar to Eq. (

The constant amplitude coefficients

Accuracy of the approximated AEM

Next the products consisting of the sums

The constant coefficients

All

Table

In consequence of nonlinear mathematical operations inside the AEM the
signals

The time function

One periode of

To generate the bit stream for the serializer each bit of the stream must be
set to a defined value. Therefore the function

For generating the bit stream in an efficient way, the zeros of

To find the zeros with little effort, a binary search algorithm is used.
Figure

The search starts in the middle of the search area. At the current position,
the sign of

All bits in the search area left of

ZePoC spectrum for

NPWM spectrum for

Figure

If the LPFs inside the ZePoC encoder are disabled, ZePoC encoding becomes
equal to NPWM. Figure

Concept: binary search for zeros of

Linear interpolation of a discretized function.

During simulation a frequency factor

For an arbitrary frequency of the AC signal

For the numerical evaluation of sine and cosine functions often the CORDIC
algorithm is used. CORDIC stands for COordinate Rotation DIgital Computer and
is an iterative algorithm

To compute a function value the correct line must be located depending on the argument. Then the slope and offset of the selected straight line are read from the table. The resulting linear equation returns the interpolated function value.

For an accuracy of 120 dB the absolute error must be less than

The size of the tables can be reduced using the symmetries

Floating point (FP) numbers are stored in a special binary format. Any FP
number consists of a sign

Table

Double precision numbers are not natively supported by the DSP. To use these 64 bit numbers on the DSP software emulation is required. This software emulation needs a lot of computing power and slows down the ZePoC algorithm dramatically. Therefore it is very important to use only FP formats natively supported by the DSP. The computation time for algorithms using 40 bit instead of 32 bit FP numbers is the same.

For generating an AC signal with a frequency

The main difference between the spectra is the noise floor. For double
precision every bin is below

Spectrum of PWM signal for double precision

Spectrum of PWM signal for extended single precision

Spectrum of PWM signal for single precision

Floating point formats.

This contribution shows that an analytical formulation of a ZePoC encoder is possible for sinusoidal input signals. The accuracy can be determined by the degree of the Taylor polynomials used to approximate the AEM.

A new pulse shaper with a very high time resolution based on a FPGA will be used for the voltage channel of the AC power standard. Therefore an easy and fast algorithm to generate a bit stream for the GHz serializer inside the FPGA is presented.

For the real-time implementation on a DSP the effects of different floating point number formats are analyzed. The accuracy of extended single precision floating point numbers is sufficient for the specified AC power standard.Edited by: M. Chandra Reviewed by: T. Funck and one anonymous referee