| Volumes Volume 7 |
ARS - Volume 7, 2009
C.4 Parallel processing| A VLSI design concept for parallel iterative algorithms Page(s) 95-100 Abstract Full Article in PDF (PDF, 128 KB) | ||
| Effiziente Verfahren zur Parallelisierung von EMV-Simulationen für den Entwurfsprozess integrierter Schaltungen Page(s) 101-105 Abstract Full Article in PDF (PDF, 477 KB) | ||
| Quantitative comparison of performance analysis techniques for modular and generic network-on-chip Page(s) 107-112 Abstract Full Article in PDF (PDF, 150 KB) |
