Advances in Radio Science
Advances in Radio Science
ARS
Articles
All volumes
RSS feeds
RSS feeds
Submission
Policies
Licence & copyright
General terms
Publication policy
Data policy
Publication ethics
Competing interests policy
Appeals & complaints
Proofreading guidelines
Obligations for authors
Obligations for editors
Obligations for referees
Inclusive author name-change policy
Peer review
Review process
Review criteria
Manuscript tracking
Reviewer recognition
Editorial board
About
Aims & scope
Article processing charges
Financial support
Scheduled proceedings
News & press
Promote your work
Journal statistics
Journal metrics
Abstracted & indexed
Article level metrics
Contact
Print copies
XML harvesting & OAI-PMH
Manuscript tracking
Volume 7, 2009
Articles
Volume 7
Volumes
Authors
Title
Abstract
Full text
Website search
Volume 7, 2009 | D.4 Digital circuits II
Volume 7
|
Volumes
Volume 7
Volumes
Volume 7, 2009 | D.4 Digital circuits II
19 May 2009
Hardwarearchitektur für einen universellen LDPC Decoder
C. Beuschel and H.-J. Pfleiderer
Adv. Radio Sci., 7, 213–218,
https://doi.org/10.5194/ars-7-213-2009,
https://doi.org/10.5194/ars-7-213-2009,
2009
CC BY 4.0
