| Volumes Volume 6 Contents of Current Session |
www.adv-radio-sci.net/6/259/2008/
doi:10.5194/ars-6-259-2008
© Author(s) 2008. This work is distributed
under the Creative Commons Attribution 3.0 License.
Hardware Accelerators for Elliptic Curve Cryptography
1Heinz Nixdorf Institute, University of Paderborn, Germany
2Chair for System Security, Ruhr-University of Bochum, Germany
Abstract. In this paper we explore different hardware accelerators for cryptography based on elliptic curves. Furthermore, we present a hierarchical multiprocessor system-on-chip (MPSoC) platform that can be used for fast integration and evaluation of novel hardware accelerators. In respect of two application scenarios the hardware accelerators are coupled at different hierarchy levels of the MPSoC platform. The whole system is implemented in a state of the art 65 nm standard cell technology. Moreover, an FPGA-based rapid prototyping system for fast system verification is presented. Finally, a metric to analyze the resource efficiency by means of chip area, execution time and energy consumption is introduced.
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Citation: Puttmann, C., Shokrollahi, J., Porrmann, M., and Rückert, U.: Hardware Accelerators for Elliptic Curve Cryptography, Adv. Radio Sci., 6, 259-264, doi:10.5194/ars-6-259-2008, 2008. Bibtex EndNote Reference Manager XML
