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www.adv-radio-sci.net/6/213/2008/
doi:10.5194/ars-6-213-2008
© Author(s) 2008. This work is distributed
under the Creative Commons Attribution 3.0 License.
A low-noise current preamplifier in 120 nm CMOS technology
Institute of Electrical Measurements and Circuit Design, Vienna University of Technology, Austria
Abstract. In this paper we examine the impact of deep sub-micron CMOS technology on analog circuit design with a special focus on the noise performance and the ability to design low-noise preamplifiers. To point out, why CMOS technology can grow to a key technology in low-noise and high-speed applications, various amplifier stages, applied in literature, are compared. One, that fits as a current preamplifier for low-noise applications, is the current mirror. Starting from the basic current mirror, an enhanced current preamplifier is developed, that offers low-noise and high-speed operation. The suggested chip is realized in 0.12 μm CMOS technology and needs a chip area of 100 μm×280 μm. It consumes about 15 mW at a supply voltage of 1.5 V. The presented current preamplifier has a bandwidth of 750 MHz and a gain of 36 dB. The fields of application for current preamplifiers are, for instance, charge amplifiers, amplifiers for low-voltage differential signaling (LVDS) based point-to-point data links or preamplifiers for photodetectors.
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Citation: Uhrmann, H., Gaberl, W., and Zimmermann, H.: A low-noise current preamplifier in 120 nm CMOS technology, Adv. Radio Sci., 6, 213-217, doi:10.5194/ars-6-213-2008, 2008. Bibtex EndNote Reference Manager XML
