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Advances in Radio Science An open-access journal of the U.R.S.I. Landesausschuss in der Bundesrepublik Deutschland e.V.

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Adv. Radio Sci., 11, 227-230, 2013
© Author(s) 2013. This work is distributed
under the Creative Commons Attribution 3.0 License.
04 Jul 2013
Implementation of a digital trim scheme for SAR ADCs
J. Bialek1, A. Wickmann2, F. Ohnhaeuser2, G. Fischer1, R. Weigel1, and T. Ussmueller1 1University of Erlangen-Nuremberg, Departement of Electrical Engineering, Erlangen, Germany
2Texas Instruments Deutschland GmbH, Germany
Abstract. Successive approximation register (SAR) analog-to-digital Converters (ADC) are based on a capacitive digital-to-analog converter (CDAC) (McCreary and Gray, 1975). The capacitor mismatch in the capacitor array of the CDAC impacts the differential non-linearity (DNL) of the ADC directly. In order to achieve a transfer function without missing codes, trimming of the capacitor array becomes necessary for SAR ADCs with a resolution of more than 12 bit. This article introduces a novel digital approach for trimming. DNL measurements of an 18 bit SAR ADC show that digital trimming allows the same performance as analog trimming. Digital trimming however reduces the power consumption of the ADC, the die size and the required time for the production test.

Citation: Bialek, J., Wickmann, A., Ohnhaeuser, F., Fischer, G., Weigel, R., and Ussmueller, T.: Implementation of a digital trim scheme for SAR ADCs, Adv. Radio Sci., 11, 227-230, doi:10.5194/ars-11-227-2013, 2013.
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